This invention relates to signal conversions, and more particularly to a resolver-to-digital converter using a phase-locked loop.
Conventional resolver-to-digital converters have in general employed some sort of resolver to analog conversion followed by an analog to digital converter. In this invention a technique is presented using a phase-locked loop to provide a conversion from the resolver-to-digital form directly with less error and with significantly fewer components than the conventional method.
The high degree of accuracy is achieved by utilizing two new principles. One is the summing of the demodulated outputs from each of the two resolver output windings. All but one of the first order error terms are thus eliminated leaving only second and a higher order even terms. The second principle eliminates the remaining first order error term, which is the error introduced by the resolver primary phase shift. This is accomplished through the use of compensation windings which are wound in the same resolver excitation stator slots.
The present invention obtains a significant reduction in components, thereby reducing the cost and increasing the reliability; it obtains a conversion accuracy of .+-. 1 minute of arc, and it uses a single speed rather than a dual speed resolver. The number of components has been reduced by 90 percent.